ISSCC 2003 / SESSION 3 / OVERSAMPLED A / D CONVERTERS / PAPER 3 . 5 3 . 5 A Continuous - Time Σ ∆ Modulator with 88 dB Dynamic Range and 1 . 1 MHz Signal Bandwidth

Wireless and wireline communication applications demand A/D converters with MHz signal bandwidth and 14b or better resolution. Compared with switched-capacitor (SC) implementations, continuous-time (CT) Σ∆ modulators have the advantages of lower power consumption and intrinsic anti-alias filtering. Moreover, as the sampler is inside of the CT Σ∆ loop (see the upper half of Fig. 3.5.1), any sampling error is noise shaped together with the quantization noise. Thus, key non-idealities of the front-end sampling network in SC modulators [1] are avoided. Prior implementations of CT Σ∆ modulators in CMOS have either narrow bandwidth [2] or limited dynamic range [3]. In this work, a proposed CT Σ∆ modulator architecture combined with multi-bit quantization and nonreturn-to-zero (NRZ) DAC pulse shaping achieves 88dB dynamic range over 1.1MHz input signal bandwidth.